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From: Beat.Jost@cern.ch
Date: 5/1/00
Time: 8:51:39 PM
Remote Name: 137.138.245.148
Agenda of LHCb Online meeting of May 3 2000
Date: 3 May 2000
Time: 14:00
Place: TBS
Agenda:
1. News
2. Agenda of FE/Controls/DAQ workshop (see attached draft agenda)
Discussion on what we can present in our slots and what should be
added/removed
3. AOB
Please let one of us know if you want to add any item to the agenda.
Clar & Beat
Draft of Agenda for FE/Controls/DAQ workshop to be held 16-19 May 2000.
----------------------------------------------------------
===================== FRONT-END ======================
----------------------------------------------------------
Organizer: Jorgen Christiansen
Tuesday afternoon:
Radiation environment
Georg van Holtey or Vadim Talanov
Radiation level estimates
Jorgen Christiansen:
Qualification of electronics for radiation effects
Daniel Lacarrere
Location of electronics
ALL: Specific problems with radiation
Changes to placement of electronics
Access to electronics in cavern and detectors
Hans Jurgen Hilke:
Access procedure, Access periods, reliability requirements
All: Identification of vital components ( trigger systems, etc.)
Reliability/redundancy of such components
Front-end error conditions
Jorgen Christiansen :
Error sources: SEU, glitches, buffer overflows, etc.
Error propagation
Error recovery
Error rate estimation
All: Special error problems in specific sub-detectors
Special error recovery problems in specific sub-detectors
Wednesday:
Resets:
Hans Dijkstra:
Physics loss related to resets
Jorgen Christiansen:
Definition of reset types
Definition of reset scenarios (agreement required NOW)
Synchronization:
Jorgen Christiansen:
"Standard bunch collision synchronization"
Dominique Breton:
Board to board synchronization (L0 trigger system)
All: Special subdetector problems and solutions (muon, outer tracker)
L1 buffer
Hans Dijkstra or Volker Lindenstruth
Buffer size requirements for L1 trigger
Expandability ( is this a must, up to which size)
All: Specific problems with given L1 buffer size (costs board space, etc.)
Interface to trigger systems:
Jorgen Christiansen
Data to read out from trigger systems
Requirements to front-end to monitor trigger systems
Hans Dijkstra:
Problems with zero-suppression when monitoring trigger systems
All: Special sub-detector/trigger problems
Interface to FEM:
Hans Muller / Francios Bal
Front-end multiplexing.
link technology
link protocol
All: Special requirements ( bandwidth, mux ratio, distance, location)
Power supplies
Jorgen Christiansen
Standardization possible ?
Radiation levels
Location
Wilfried Flegel:
Magnetic stray fields in cavern
All: Special requirements to power supplies (low noise, etc.)
Grounding:
Raymond Frei:
Ground loop prevention
(isolated of detectors, Isolation from mechanical structures,
optical/copper links)
Signal shielding (LVDS)
Special grounding problems in Vertex detector
All: Specific subdetector problems
----------------------------------------------------------
===================== DAQ ======================
----------------------------------------------------------
Organizer: Beat Jost
Thursday (morning)
TFC (timing and fast control)
Status
Partitioning and related distribution switch Beat Jost 20'
Requirements to readout supervisor Richard Jacobsson 20'
Discussion All 20'
Throttling
Throttling Infrastructure
Keeping track of dead time
Keeping track of who throttles Beat Jost 30'
Discussion All 30'
Readout unit: (exact topics to be confirmed)
Data checking
Error recovery
Non zero-suppressed data ? Hans Muller 30'
Total 2h30'
----------------------------------------------------------
===================== CONTROLS ======================
----------------------------------------------------------
Organizer: Clara Gaspar
Thusday (afternoon):
Chip level controls
Control system for CMS tracker Sandro Marchioro 30'
Long distance I2C/JTAG (???)
Discussion All 20'
Summary of Control requirements
from sub-detectors ( Bandwidth ,
number of boards, etc.) Clara Gaspar 10'
Discussion All 30'
Vertex detector control:
Interface to LHC machine
Safety, UPS, etc. Massi Ferro-Luzzi 20'
Board level controls
Credit card PC's/ Local Board Control bus Beat Jost 30'
Firewire???? Geneva Engineering School 10'
Discussion All 20'
General ECS Infrastructure Clara Gaspar 30'
Total: 3h20'
Friday (morning)
Summaries
Front-End Joergen 15'
DAQ Beat 15'
Controls Clara 15'
General Discussion on open issues/proposed technologies, etc. All 0'-90'
Total: <2h30'